名稱(chēng):洗衣機(jī)控制器VHDL代碼vivado仿真
軟件:vivado
語(yǔ)言:VHDL
代碼功能:
洗衣機(jī)控制器
(1)設(shè)計(jì)一個(gè)洗衣機(jī)控制器,使洗衣機(jī)作如下運(yùn)轉(zhuǎn):定時(shí)啟動(dòng)—〉正轉(zhuǎn)20秒—〉暫停10秒—〉反轉(zhuǎn)20秒—〉暫停10秒—〉定時(shí)不到,重復(fù)上面過(guò)程。
(2)若定時(shí)到,則停止,并發(fā)出提示信號(hào)。
(3)用兩個(gè)數(shù)碼管顯示洗滌的預(yù)置時(shí)間(15分鐘),按倒計(jì)時(shí)方式對(duì)洗滌過(guò)程作計(jì)時(shí)顯示,直到時(shí)間到停機(jī);洗滌過(guò)程由開(kāi)始信號(hào)開(kāi)始。
(4)三只LED燈表示正轉(zhuǎn)、反轉(zhuǎn)、暫停三個(gè)狀態(tài)。
FPGA代碼Verilog/VHDL代碼資源下載:www.hdlcode.com
演示視頻:
設(shè)計(jì)文檔:
1. 工程文件
代碼功能
(1)設(shè)計(jì)一個(gè)洗衣機(jī)控制器,使洗衣機(jī)作如下運(yùn)轉(zhuǎn):定時(shí)啟動(dòng)—〉正轉(zhuǎn)20秒—〉暫停10秒—〉反轉(zhuǎn)20秒—〉暫停10秒—〉定時(shí)不到,重復(fù)上面過(guò)程。
(2)若定時(shí)到,則停止,并發(fā)出提示信號(hào)。
(3)用兩個(gè)數(shù)碼管顯示洗滌的預(yù)置時(shí)間(15分鐘),按倒計(jì)時(shí)方式對(duì)洗滌過(guò)程作計(jì)時(shí)顯示,直到時(shí)間到停機(jī);洗滌過(guò)程由開(kāi)始信號(hào)開(kāi)始。
(4)三只LED燈表示正轉(zhuǎn)、反轉(zhuǎn)、暫停三個(gè)狀態(tài)。
2. 程序文件
3. 程序編譯
4. RTL圖(代碼框圖)
5. 管腳分配
6. Testbench
7. 仿真圖
整體仿真圖
控制模塊
倒計(jì)時(shí)模塊
數(shù)碼管譯碼模塊
部分代碼展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; ???USE?ieee.std_logic_unsigned.all; ENTITY?washing_machine?IS ???PORT?( ??????clk_in?????:?IN?STD_LOGIC;--100MHz ??????start_key??:?IN?STD_LOGIC;--啟動(dòng)按鍵-BTNL ?????? ??????led????????:?OUT?STD_LOGIC_VECTOR(2?DOWNTO?0);--正轉(zhuǎn),反轉(zhuǎn),暫停??LED?0?1?2 ??????end_led????:?OUT?STD_LOGIC;--洗衣結(jié)束信號(hào)?LED?3 ?????? ??????bit_select??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--數(shù)碼管位選 ??????seg_select??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--數(shù)碼管段選 ???); END?washing_machine; ARCHITECTURE?Behavioral?OF?washing_machine?IS --譯碼器驅(qū)動(dòng)電路模塊 Component?decoder?IS PORT?( clk_in?:?IN?STD_LOGIC?; washing_time?:?IN?STD_LOGIC_VECTOR?(7?downto?0); bit_select??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--數(shù)碼管位選 seg_select??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--數(shù)碼管段選 ); end?Component?; Component?subtraction?IS PORT?( clk_in??:?IN?STD_LOGIC;--50Hz start_key_rise??:?IN?STD_LOGIC; min_en_rise????:?IN?STD_LOGIC; washing_time???:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0) ); end?Component?; Component?Sequential_circuit?IS PORT?( clk_in?????:?IN?STD_LOGIC;--50Hz start_key??:?IN?STD_LOGIC;--啟動(dòng)按鍵 washing_time???:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);?????? led????????:?OUT?STD_LOGIC_VECTOR(2?DOWNTO?0);--正轉(zhuǎn),反轉(zhuǎn),暫停 end_led????:?OUT?STD_LOGIC;--洗衣結(jié)束信號(hào) ?????? start_key_rise_out????:?OUT?STD_LOGIC; min_en_rise_out???:?OUT?STD_LOGIC ); end?Component?; ???SIGNAL?washing_time????????:?STD_LOGIC_VECTOR(7?DOWNTO?0)?:=?"00000000";--預(yù)置洗衣時(shí)間15分鐘 ??? ???SIGNAL?start_key_rise??????:?STD_LOGIC:='0'; ???SIGNAL?min_en_rise?????????:?STD_LOGIC:='0';??? ??? ???SIGNAL?duanxuan2?????????????:?STD_LOGIC_VECTOR(7?DOWNTO?0)?:=?"00000000"; ???SIGNAL?duanxuan1????????????:?STD_LOGIC_VECTOR(7?DOWNTO?0)?:=?"00000000"; BEGIN --控制模塊 i_Sequential_circuit?:?Sequential_circuit? port?map?( clk_in?=>?clk_in, start_key??=>?start_key, washing_time?=>?washing_time,?????? led????=>?led, end_led?=>?end_led, ?????? start_key_rise_out??=>?start_key_rise, min_en_rise_out???=>?min_en_rise ); --倒計(jì)時(shí)模塊 i_subtraction?:?subtraction port?map?( clk_in??=>?clk_in, start_key_rise??=>?start_key_rise, min_en_rise????=>?min_en_rise, washing_time???=>?washing_time ); --譯碼器驅(qū)動(dòng)電路模塊??? i_decoder?:?decoder? port?map?( clk_in?=>?clk_in, washing_time?=>?washing_time, bit_select???=>bit_select,--數(shù)碼管位選 seg_select???=>seg_select--數(shù)碼管段選 ); ??? END?Behavioral;
點(diǎn)擊鏈接獲取代碼文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=484